JDF G
// Created by Project Navigator ver 1.0
PROJECT np1003s16
DESIGN np1003s16
DEVFAM spartan2
DEVFAMTIME 0
DEVICE xc2s100
DEVICETIME 0
DEVPKG tq144
DEVPKGTIME 0
DEVSPEED -5
DEVSPEEDTIME 0
DEVTOPLEVELMODULETYPE HDL
TOPLEVELMODULETYPETIME 0
DEVSYNTHESISTOOL XST (VHDL/Verilog)
SYNTHESISTOOLTIME 0
DEVSIMULATOR Other
SIMULATORTIME 0
DEVGENERATEDSIMULATIONMODEL VHDL
GENERATEDSIMULATIONMODELTIME 0
SOURCE np1003s16.vhd
DEPASSOC np1003s16 np1003s16.ucf
[Normal]
xilxBitgStart_Clk=xstvhd, spartan2, VHDL.t_bitFile, 1098445392, CCLK
[STRATEGY-LIST]
Normal=True